As is known, there are electronic circuits which are integrated monolithically on a semiconductor and provided with a resident memory portion.
Typical examples of such circuits are certain families of microcontrollers which include an "on board" memory device, that is a memory circuit portion integrated to the microcontroller.
SGS-Thomson Microelectronics, Inc., the assignee of the present invention, has product lines that include a range of such microcontrollers, known by their trade designations ST9, ST7, ST6, ST10.
The integrated memory portion may be, in this range of microcontrollers, either of the EPROM (Erasable Programmable Read-Only Memory) or the ROM (Read-Only Memory) types.
With the former type, the memory contents may be modified subsequently to the manufacture of the electronic circuit, since memories of the EPROM or Flash EEPROM types, although non-volatile, can be programmed and/or erased electrically.
With the latter type, on the contrary, the information contained in the ROM circuit portion cannot be modified, once the fabrication of the electronic circuit is completed.
The skilled persons in the art are quite familiar with the different design and construction aspects of EPROM and ROM memories, and will readily appreciate the need to provide a different circuit topography according to whether an electronic circuit is to incorporate an EPROM or a ROM type of memory.
In essence, the state of the art provides no ways of altering the making of a given memory type during the process of fabricating an electronic circuit. In fact, for electronic circuits with an embedded memory, EPROM or Flash memories are used at the prototype stage, and corresponding ROMs are then used for mass production. According to such prior art, the switch from an EPROM to a ROM type of memory involves thorough re-designing of the cell array and its ancillary circuitry.
The underlying technical problem of this invention is, therefore, to provide a method of automatically shifting from the fabrication of an EPROM type of memory cell to the fabrication of a ROM type of memory cell, particularly for semiconductor electronic circuits having a resident memory, which method involves no full re-designing of the cell array and its ancillary circuitry.
This would allow EPROM cells to be replaced with ROM cells during the electronic circuit fabrication, to thereby dramatically lower its manufacturing time and cost, fill a market's demand, and overcome the limitations which beset the state-of-art fabrication processes.